1. Field of the Invention
The present invention relates to an improved method for driving a liquid crystal display, and more particularly to a method of reducing flickers and a method of increasing charging time of a liquid crystal display.
2. Description of the Related Art
Liquid crystal displays (LCDs) have become popular in recent years. Not only can LCDs save spaces, but power consumption can also be reduced. LCDs with large sizes and high resolutions have replaced traditional displays, such as cathode radiation tube displays. Large-size LCDs, however, have a serious issue. The larger the screens of LCDs, the more serious the flicker on the screens of LCDs.
FIG. 1 is a configuration showing a basic structure of an LCD. The gate driver 102 turns on or off the thin film transistor (TFT). The source driver 101 outputs data to a liquid crystal capacitor so that the voltage supplied to the liquid crystal capacitor reaches a desired level when the TFT is turned on.
Traditionally, the gate driver IC 102a of the LCD outputs control signals to turn on the TFTs sequentially. The source driver IC 101a then outputs the data to the liquid crystal capacitors. Due to the inherent characteristics of the LCD, the flicker would occur while display images.
FIG. 2 is a schematic configuration of a subpixel in a LCD panel. Generally, a LCD subpixel comprises a switch device, such as a TFT, a liquid crystal capacitor CLC, and a holding capacitor Cst, which are both coupled to the TFT. A plurality of subpixels constitute a row-and-column array. Gates G of subpixels in the same column are coupled to a scan line, and sources S of subpixels in the same row are coupled to a data line. As shown in FIG. 2, when the n-th scan line Gn is selected, the gate driver IC of the LCD outputs the control signal to the n-th scan line Gn, i.e., to the gate G of the TFT. The data signal waveform is transmitted to the n-th data line Sn. The TFT then is turned on, and the data is transmitted from the source S of the TFT to the drain D of the TFT to charge the liquid crystal capacitor CLC and the holding capacitor Cst. According to the voltage across the liquid crystal capacitor CLC, the subpixel displays the gray level of the subpixel for displaying image. The holding capacitor Cst maintains the voltage across the liquid crystal capacitor CLC during the displaying cycle.
The outputted control signal waveform shown in FIG. 2 is a square waveform. During the LCD semiconductor manufacturing process, stray capacitance and resistance are generated on the scan line, which causes RC delay and eventually results in the distortion of the waveform. FIG. 3A is a configuration showing a control signal waveform outputted from a gate driver IC of the LCD. In FIG. 3A, VGH and VGL represent a high voltage level and a low voltage level of the control signal waveform, respectively. ΔVGH represents the difference between the high voltage level and the low voltage level. FIG. 3B is a configuration showing a distorted waveform after the influence of the stray capacitance and resistance on the scan line. FIG. 3C is a configuration showing a waveform at the end portion of the scan line. V1 represents the high voltage level after waveform distortion, and ΔV1 represents the difference between the high voltage level and the low voltage level after waveform distortion. The impact caused by the RC delay to the control signal waveform can be clearly seen. The waveform at the end portion of the scan line is different from the front portion of the scan line. The situation becomes worse when the screen size of the LCD is increased. The control signal waveform at the end portion of the scan line requires more time to reach the voltage level, such as VGH and VGL.
In order to turn off all TFTs on the scan line Gn while the scan line Gn+1 is triggered, a gate output enable (GOE) signal is outputted from the gate driver IC to make sure that two neighboring scan lines will not be enabled simultaneously. The timing is shown in FIG. 4. Conventionally, a charging time, i.e., a clock pulse, for a scan line is t4. If the GOE signal is applied, the charging time is reduced by Δt and the actual charging time of the scan line is t5. The higher the resolution of the LCD, the shorter the clock pulse t4. In addition, the larger the screen size of the LCD, the longer the scan line, and the worse the RC delay. Accordingly, Δt should be increased to avoid simultaneously enabling two neighboring scan lines.
With the trend of a large-size LCD screen with higher resolution, the charging time t4 is reduced, and since Δt should be kept at a certain interval, the actual charging time t5 becomes shorter. Therefore, the charging time is insufficient. For manufacturing a large-size LCD with high resolution, the insufficient charging time would work against it.
Another issue when driving the LCD is the feed-through effect. This effect is shown by the formula below:
                                          V            feedthrough                    =                                                    C                GD                                                              C                  GD                                +                                  C                  LC                                +                                  C                  st                                                      ⁢            Δ            ⁢                                                  ⁢            V                          ,                              Δ            ⁢                                                  ⁢            V                    =                      (                          V              -                              V                GL                                      )                                              (        1        )            
In formula (1), CGD represents the stray capacitance between the gate and drain of the TFT, CLC represents the liquid crystal capacitance, Cst represents the holding capacitance, and ΔV represents the voltage difference at the end of the control signal waveform.
FIG. 5 is a configuration showing a positive filed and a negative field. The voltage of the liquid crystal capacitor is charged to the desired voltage level during the turn-on period of the TFT, but the voltage is reduced by ΔVa when the signal is cut off because of the stray capacitance CGD between the gate and drain of the TFT. The voltage reduction will cause voltage difference between the voltage over the liquid crystal capacitors and the common voltage Vcom in the positive and negative fields. The voltage difference would result in a flicker effect. The conventional method to resolve the issue is to adjust the common voltage Vcom so that the voltage difference between the voltages over the liquid crystal capacitors and the common voltage Vcom in the positive and negative fields are equal. The dotted line of FIG. 5 represents the adjusted common voltage V′com. The flicker effect of displaying is thus prevented.
What stated above is an ideal situation. If all the liquid crystal subpixels have the same feed-through effect, the flicker effect can be effectively resolved by adjusting the common voltage Vcom. However, during the manufacturing process, the feed-through effects on the liquid crystal subpixels are different. The improvement after adjusting the common voltage Vcom is limited. As shown in FIGS. 3A-3C and the formula (1), there is a voltage difference ΔV of the control signal waveforms at the front and end portions of the same scan line. The high voltage level V1 of the distorted waveform is smaller than the high voltage level VGH of the control signal waveform. That is, the voltage difference ΔV1 between the high voltage level and the low voltage level of the control signal at the end portion of the scan line is smaller than the voltage difference ΔVGH between the high voltage level and the low voltage level of the trigger signal at the front portion of the scan line. As a result, the feed-through voltage Vfeedthrough at the front portion of the scan line is different from the feed-through voltage Vfeedthrough at the end portion of the scan line. Even if the common voltage Vcom is adjusted, the voltage difference between the voltages over the liquid crystal capacitors and the common voltage Vcom at the end and the front portions of the scan line are still different. The flicker effect still remains.
Different from those two methods of resolving the flicker effect mentioned above, another conventional method provides a trimmed waveform to reduce the feed-through voltage effect. As shown in FIG. 6A, by using the trimmed waveform, the voltage difference ΔV between the high voltage level and the low voltage level at the end of the control signal waveform changes from ΔVGH to ΔV′GH. Because of the reduction of the voltage difference ΔV at the end of the control signal waveform, the feed-through voltage effect is also reduced. This method, however, cannot prevent the waveform distortion effect caused by the RC delay on the scan line. As shown in FIG. 6B, due to the RC delay, the waveform at the end portion of the scan line rises slowly, which would result in different voltage level when the trimming operation is triggered. That is, the high voltage level VGH is higher than the high voltage level V2 of the distorted waveform. Thus, the voltage level of the trimmed waveform is also different. Namely, the voltage difference ΔV′GH between the high voltage level and the low voltage level is larger than the voltage difference ΔV′2 between the high voltage level and the low voltage level of the distorted waveform. According to FIGS. 6A and 6B, though the feed-through voltage effect can be reduced, voltage difference between the voltages at the end and the front portions of the scan line and the common voltage Vcom are still different. The flicker effect still cannot be resolved.
Accordingly, the LCD should be improved in some aspects. One is that the charging time of the liquid crystal capacitor should be increased. Another is that the RC delay on the scan line should be reduced so that the feed-through voltage Vfeedthrough at the front portion and end portion of the scan line can be substantially equal.